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Transformer Math & CPU SLM
Model size
350M Q4 (200MB)
1.5B Q4 (800MB)
3B Q4 (2GB)
7B Q4 (4GB)
RAM BW
DDR4 (50 GB/s)
DDR5 (70 GB/s)
Apple M3 Max (200 GB/s)
Per-token latency lower bound = model_bytes / RAM_bandwidth.
What you're seeing
At batch=1, must read all weights per token. RAM bandwidth is the floor on inference speed.
★ KEY TAKEAWAY
CPU SLM inference is memory-bandwidth-bound. Per-token time ≈ model_size / RAM_BW.
▶ WHAT TO TRY
Pick a model size — see the BW-bound lower latency bound.
Compare DDR5 (70 GB/s) vs Apple M3 Max (200 GB/s) — proportional speedup.
This is why INT4 (4× smaller weights) is the standard for CPU inference.